Conventionally, a switch driving circuit for complimentarily turning on and off a first output switch and a second output switch connected in series between two different potentials is provided with a dead time (a simultaneous ON prevention time) during which both the switches are turned off to prevent a through current when an ON/OFF state of each of the switches is changed.
Further, as an example of the related art, there is known a dead time adjusting circuit for generating a direct current (DC) voltage signal in proportion to a dead time and adjusting the dead time using the generated DC voltage signal.
In the dead time adjusting circuit, a first driving signal for turning on and off the first output switch and a second driving signal for turning on and off the second output switch are monitored to generate the DC voltage signal in proportion to the dead time.
When a switching frequency fsw is relatively low (for example, when fsw is about 1 to 2 MHz), a desired dead time is about 10 to 20 ns, which is relatively long, and thus, there is no particular problem even in setting the dead time using the related art described above.
However, when the switching frequency fsw is relatively high (for example, when fsw is about 20 MHz), a desired dead time is very much shortened to a few ns. Thus, it is difficult to set a desired dead time using the related art in which the output switch driving signals are monitoring targets.